Automatic Allocation of Redundant Operators in Arithmetic Data path Optimization

Redundant operators such as adders and multipliers increase performance (timing and area) of high computational digital circuits. Mixing redundant operators with classical ones is nevertheless complex for circuit designers who might not have necessarily the required arithmetic knowledge. In this context, Computer Aided Design tools considering redundant arithmetic are of interest. In this paper, several algorithms based on graph theory are described. They replace some classical operators of a design with redundant ones to minimize the overall timing. Several real life experiments are presented.